Embedded Office Solution

Xilinx Ultrascale+ Safety Platform

Example for an Ultrascale+ Safety Platform

This solution shall meet the following requirements:

  • Linux on Cortex-A53 Quad-Core  -  We want to use symmetric multiprocessing with Linux on the Cortex-A53 Quad-Core for high-performance calculations.
  • Flexible Safety RTOS on Cortex-R5  -  To meet safety diagnostic coverage, we run Cortex-R5 in Lock-Step Mode with the Flexible Safety RTOS.
  • Safe Inter-Core Communication  -  We want to use end-to-end protected communication between the Linux and RTOS application parts.

    • Furthermore, this solution shall meet some high-level business goals:

  • Integrated Platform  -  We want to start application development, without the need for integration activities of RTOS and Linux system
  • LTS for complete Platform  -  We want to have a long-term supported (LTS) safety platform.

    • Building Blocks

    Flexible Safety RTOS

    The Flexible Safety RTOS provides deterministic hard-real-time scheduling and is responsible for:

  • Scheduling safety-related tasks
  • Task synchronization services
  • Task communication services

    • Integration Service

    With this Integration Service, the system is set up with required features and includes:

  • Inter-Core Communication
  • Configurable end-to-end protection
  • Workshop for system handling

    • Xilinx PentaLinux

    The Linux distribution from Xilinx with special adjustments to the Ultrascale+ ensures:

  • Linux application programming
  • Device driver availability
  • Optimized for symmetric multi-processing

    • Architectural Overview

    Description

    This usage scenario provides a Linux application software on a high-performance quad-core Cortex-A53, monitored by the Flexible Safety RTOS running on the lockstep Cortex-R5 cores. A safe communication and monitoring library completes this high-performance system. All safety software parts are already pre-certified.

    Xilinx Ultrascale+ Safety Platform
    Architectural Overview of Xilinx Ultrascale+ Safety Platform