Space Protection

Space Protection for Separation of Software Components

The Space Protection Extension for µC/OS-II from Micrium allows the usage of already existing hardware memory protection units in modern microcontrollers.

RTOS Space Protection

Learn the benefits of memory protection for your system

The Hardware Memory Protection Units

Our Space Protection Extension complements the real-time kernel µC/OS-II from Micrium to the possibility of comfortable use of memory protection units of modern microcontrollers. Requirement is one of the widely available memory protection units:

  • Memory Management Unit (MMU) or
  • Memory Protection Unit (MPU)

The Memory Management Unit (MMU) and the Memory Protection Unit (MPU) are memory protection units and are designedto control access to memory. The memory management unit additionally has the option to perform an address transformation, that is real memory addresses (so-called "physical addresses") are translated to desired addresses (so-called "virtual addresses").

Advanced features of the real-time kernel

Functions of real-time kernel µC/OS-II

All service functions of the proven real-time kernel µC/OS-II remain unchanged. Thus a switch of a system is possible. The possibilities of the real-time system with memory protection are composed of the RTOS services and the functions for Space Protection:


  • Preemptive Multi-Tasking
  • Software Timer
  • Process Memory Protection
  • Memory Management

Event Handling

  • Flags
  • Semaphores
  • Mutex


  • Queue
  • Mailbox
  • Shared Memory


The management of the write access to memory areas is set up using service function calls. Such a managed storage area is called process. Following one or more tasks can be assigned to the process.

RTOS Services

All services of µC/OS-II are unchanged and can be used as usual. For all services of Micrium's µC/OS-II, which are used for synchronization and communication, we have used a zero-copy technology.

Shared Memory

In addition to the proven services of µC/OS-II we add a shared memory service within the extension. This service allows sharing of storage areas with write access for tasks from different processes.


The real-time kernel undergoes regular improvements and additions from our safety-critical projects. We always pay attention to the goal of a real-time kernel: Best performance and maximum safety.

Value provided by the Kernel with Space Protection

Monitoring at Runtime

With the Space Protection Extension we recognize problems like unforeseen memory accesses during development and can analyze them with the collected and provided data.

Rapid Reaction on Errors

If an unwanted memory access occurs, the Space Protectioin Extension responds directly and immediately to this attempt. You will receive information about the cause and can respond to the erroneous access.

Robust Real-Time Kernel

By default, the Space Protection Extension is made for the real-time kernel µC/OS-II from Micrium​​. You receive a complete system with a stable working real-time kernel - even when an application task makes a mistake.

Separation of Software

The Space Protection mechanisms ensures that software components works with freedom of interference. The accesses are under your control and can be controlled using services of real-time kernel.

Growing Number of Supported Micro Controller

Available RTOS Systems with Space Protection

See below an extract of existing RTOS Systems with Space Protection. We have designed the Space Protection Extension to add new microcontroller for any RTOS very fast and with low effort.

Core CPU Compiler
ColdFire MCF54415 CodeWarrior
Cortex A5 ATSAMA5D36 IAR
Cortex A7 i.MX6UL GCC
Cortex A9 Altera SoC ARM
Cortex M3 LPC1850
Cortex M4F K21F
Cortex R4 RM42
Code Composer Studio
Cortex R5 RM57
Code Composer Studio
PowerPC MPC5675K
TriCore TC1793
Aurix TC22x
Aurix TC27x
Aurix TC29x
Aurix TC39x

If your microcontroller is not listed, just ask us. We are working continuously on new systems.

Additional Information

We compiled some information about the memory protection units within different cores for you.


The ARM9 core includes a MMU unit. The MMU is organized with tables of two levels, stored in RAM. The evaluation of the tables (the so-called "Table-Walk") is completely performed in hardware.


The Cortex-A family includes a MMU. This MMU is a evolution of the ARM9 family MMU. This MMU supports better control of Caches and optionaly supports Multi-Core features.


The Cortex-M3 includes a MPU. The MPU units are optional and can be activated by the chip vendors. Since the Cortex-M3 microcontrollers are often designed for small, low-cost applications, the MPU is often disabled. Therefore check the datasheet of the chip manufacturer, if you want to take advantage of memory protection.


The Cortex- M4 core includes an MPU. In this core family the chip manufacturer must enable the MPU. The performance of the Cortex-M4f is in a regionwhere the MPU is usually enabled. For safety, we recommend: please check the datasheet of the chip manufacturer, if you want to take advantage of memory protection.

Note: A special feature is in the Kinetis microcontroller family (NXP, former Freescale). In these microcontrollers the MPU from ARM is disabled, and in some devices a different implementation by Freescale is integrated.


The Cortex-R family includes a MPU. This MPU has been activated in all microcontrollers from all chip vendors we have seen. Well, this makes sense, as these chips are intended mostly as "Safety Chip", and therefore the memory protection is most beneficial.

TriCore / Aurix

The TriCore includes a MPU. The Aurix is ​​a Multi-Core microcontroller with multiple TriCores for safety-critical applications. This chip includes multiple MPUs separately for bus system, peripherals and memory.

You are Interested in Space Protection ...

Get Your Free Test Package

We offer free test packages for a selection of popular microcontrollers. Convince yourself of the high performance and stability of the Flexible Safety RTOS.

Related Products and Services

The so-called Flexible Safety RTOS is the real-time kernel with memory protection, pre-certified for applications in the field of functional safety according to IEC 61508, ISO 26262 and IEC 62304

Take advantage of our experience in functional safety and real-time kernels within your project. Through the Safety Mentoring with adaptation and certification of a real-time kernel to your special requirements in the project, we can provide an optimized solution.